1. Field of the Invention
The present invention generally relates to pulse width modulated (PWM) inverters and, more particularly, to an inverter control which generates in real-time pattern sets that reject selected harmonics and account for known fixed harmonic distortion on a direct current (d.c.) voltage link. A particular feature of the invention is the use of a "quick" Fourier transform algorithm for the real-time pattern selection.
2. Description of the Prior Art
PWM inverters are employed to convert direct current (d.c.) to alternating current (a.c.). In many applications, it is important to carefully regulate the quality of the a.c. generated by the inverter. Accordingly, it is customary to define a point of regulation (POR) downstream of the inverter at which the voltage and current of the a.c. signal generated by the inverter is sampled. The sampled voltage and current are used to select appropriate PWM switching patterns to minimize distortion at the POR. Based on the voltage and current sensed at the POR, an inverter controller selects or creates in real time an appropriate PWM pattern to ensure the least distortion at the POR. Obviously, as real and reactive power factors of electrical loads coupled to the inverter change, the PWM patterns fed to the inverter change.
A PWM pattern comprises a set of switching transients which, when applied to a d.c. signal via an inverter, produces alternating pulses which, when filtered, approximates a sinusoidal a.c. signal. The pulses in a PWM pattern are of varying width. Normally, the inverter control can be adjusted so that the inverter adequately reproduces the PWM pattern under a single operational condition and thereby creates an accurate approximation of a sinusoidal a.c. signal from the d.c. voltage. However, under other load conditions (particularly when loads are unbalanced or have particular real or reactive power components), the inverter controller selects a PWM pattern which has switching transients defining pulses which will not be faithfully reproduced by the inverter due to physical limitations of the transistor switches and their dependence upon operating conditions. In other words, the transistor switches within the inverter have physical limitations which manifest themselves, among other ways, in a minimum allowable switching time and delays in following switching commands. Thus, should the inverter switch be called upon to switch faster than it is able, it will be unable to do so and therefore will be unable to faithfully reproduce a part of the PWM pattern required to maintain the least distortion at the POR. Accordingly, under some conditions, the POR distortion cannot be regulated due to physical limitations of the transistor switches in the inverter.
Prior inventions have addressed schemes for controlling current and voltage at the POR. Representative of such inventions is U.S. Pat. No. 4,527,226 to Glennon which discloses an inverter control system for a PWM inverter circuit. This circuit comprises an angle set look up table and selection logic for addressing the look up table. The, angle set defining the inverter output waveform is selected in response to various operating conditions of the inverter.
U.S. Pat. No. 4,595,976 to Parro, II discloses an inverter control which is an enhancement of the Glennon inverter control. More specifically, the table look up is implemented as a plurality of memories, one for each phase, each of which is subdivided into a plurality of memory blocks which store a number of bytes. Memory address decoding logic addresses a particular memory block in each memory in accordance with a control signal representing the desired waveform to be generated at each phase output. Thus, the Parro, II inverter control accomplishes individual phase regulation of the inverter output.
U.S. Pat. No. 4,635,177 to Shekhawat et al. discloses a further refinement of the basic Glennon inverter control system. More specifically, the Shekhawat et al. control permits on-line generation of PWM patterns for a neutral point clamped PWM inverter. A microprocessor and memory are coupled to the generating circuitry for calculating switching points for the inverter switches during operation of the inverter. Timer modules are coupled to the microprocessor for developing switch points so that the switches are operated to reduce the distortion of the inverter output signal.
U.S. Pat. No. 4,480,299 to Muto et al. also discloses a microprocessor controlled inverter control. However, the Muto et al. PWM inverter is controlled by the use of the fundamental wave voltage of the inverter output as a feedback quantity. Muto et al. fail to show any apparatus for directly dealing with the physical limitations within the inverter itself.
U.S. Pat. No. 4,807,103 to Uesugi discloses a controller for a PWM controlled inverter which comprises a read only memory (ROM) that stores instantaneous output voltage and duration data. The ROM is addressed by an address counter which advances in response to an electrical angle counter. The data read out of the ROM is supplied to a waveform shaping circuit which generates the drive signals for the inverter switches. The data in the ROM is minimized by avoiding the necessity of writing the same data in a plurality of addresses.
The state of the art analysis for the control of selected harmonic content of PWM inverter output as represented by the foregoing patents assumes a "stiff link"; i.e., a constant, unvarying d.c. voltage and unvarying switch performance. In many applications, and particularly for applications in aircraft, such an assumption is not justified. In practice, the variation of the d.c. link and switching performance changes cause serious harmonic distortion that needs to be addressed.